Location: Santa Clara, CA, United States
Description
Invent the future with us.
Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing.
By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow.
Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply. Come invent the future with us.
About the role:
The ideal candidate will work with multi-functional global teams to verify IOBIST and JTAG/IJTAG DFT features on our next generation highly complex server processor products. Work in close collaboration with test engineering team to deliver ATE patterns and post silicon bring-up and debug. The ideal candidate will lead verification of high-performance microprocessors. The candidate is able to work with third party IP. You will develop system level and unit level test plans and test benches for verification of high speed IOBIST interfaces for DDR, SERDES hardware. You will write test benches using System Verilog and UVM.
DFT DV work at Ampere is interesting, challenging, and will expand pre-silicon verification to silicon debug. We like to bring out the best in people, teach each other, and produce products that have value in the market.
What you'll achieve:
About you:
What we'll offer:
And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.