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Principal Physical Design Engineer

Location: Bangalore, KA, India

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Description

The Role
 
Ampere is seeking a highly skilled and experienced candidate with proven expertise in PHY hardening, particularly in DDR and SerDes, with a focus on HBM PHY hardening.
We are looking for a self-motivated individual with a proven track record in hardening state-of-the-art PHYs and contributing to the development of cutting-edge expertise.
 
What you’ll do
 
As a PHY Hardening Engineer, you will collaborate with architects, RTL designers, packaging and PCB design teams, and post-silicon validation groups. This is an exceptional opportunity to showcase your engineering skills in a dynamic, fast-paced environment that fosters innovation and operates at the forefront of technology.
 
High-Speed Digital Design
  • Develop high-speed digital layouts, including DDR and other high-speed interfaces.
  • Expertise in floor planning, bump planning, routing, power grid design, clock design/distribution, and optimization for high-speed digital circuits.
  • Optimize layouts to minimize signal integrity issues, reduce power consumption, and meet timing, power, and manufacturability requirements.
  • Coordinate with PHY vendors for hardening activities and deliverables.
  • Estimate effort and timelines for PHY hardening tasks and provide feedback on timing/PDV.
Chip-Level Physical Design
  • Perform chip-level tasks such as floor planning, partitioning, and power/clock distribution.
  • Handle chip assembly and ensure seamless integration of multiple IP blocks into the top-level design.
  • Proficiency in using EDA tools for chip-level physical verification (DRC, LVS, ERC).
  • Collaborate with the packaging team to refine bump placement and package routing considerations.
HBM Protocol and Physical Design
  • Knowledge of HBM floor planning and partitioning to achieve efficient integration with the chip.
  • Design high-bandwidth memory systems, including interfaces, memory arrays, and TSV (Through-Silicon Via) structures.
  • Work with architects and RTL teams to develop physical constraints and optimize HBM interfaces.
  • Integrate HBM PHYs, controllers, and memory stacks into the top-level design.
Signal and Power Integrity
  • Familiarity with signal and power integrity concepts in high-performance memory systems.
  • Expertise in managing high-speed signals to mitigate issues like crosstalk, reflection, and signal degradation.
  • Perform thermal and power integrity analysis to ensure reliable designs.
Advanced Packaging
  • Experience with advanced packaging technologies, such as 2.5D/3D integration, TSV, and interposer-based designs.
  • Handle micro-bump design to ensure proper alignment and minimize resistance.
  • Understand the SIPI impacts of bump placement.
  • In-depth knowledge of HBM memory requirements from both packaging and SIPI perspective, with the ability to adopt and implement best design practices recommended by PHY and memory vendors
Low-Power Design
  • Implement and verify power intent using UPF/CPF for multi-voltage and power-gating designs.
  • Collaborate with architects to refine low-power strategies like clock/power gating and voltage scaling.
Design-for-Test (DFT)
  • Basic understanding of DFT structures, including scan chains, MBIST, and loopback mechanisms.
  • Contribute to DFT-based timing closure activities.
What you’ll bring
  • Strong communication and articulation skills are required to excel in this role
  • Electrical or Computer Engineering - Bachelor's degree & 8 years of related experience; or Master's degree & 6 years; or PhD & 3 years
Our Company  
Ampere is designing the future of hyperscale cloud and edge computing with the world’s first cloud native processor. Built for the cloud with a modern 64-bit Arm server-based architecture, Ampere gives customers the freedom to accelerate the delivery of all cloud computing applications. With industry-leading cloud performance, power efficiency and scalability, Ampere processors are tailored for the continued growth of cloud and edge computing.
Our Story  
Like the scientist behind its name, Ampere employees are innovators. We understand the needs of cloud computing and different software requirements. We are inventing what comes next and looking at everything from the structure of memory and how efficient the system is, to considerations on speed, cost of electricity and ability to cool. Power, size, weight and cost are driving the technology requirements and the innovation to come.
Our world class team of engineers, with depth and expertise in the cloud and semiconductor industries, is not only focused on the development of new semiconductor designs but also building out the first software ecosystem for Arm®-based server processors. Through the Ampere approach to the cloud and edge, we give our customers the freedom to challenge the status quo and accelerate next-generation data centers for the most memory-intensive applications.  Given the challenge we have outlined, we are building a culture of entrepreneurs that ensure customers come first, proactively approaching industry challenges in the areas of security, power and performance, delivering results that matter most.




Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.
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